| 摘要 |
Analog-to-digital (A/D) and digital-to-analog (D/A) converter circuits are provided using charge redistribution. The analog-to-digital converter circuit also employs successive approximation binary search techniques wherein the number of search voltages generated is a minimum. The analog-to-digital circuit includes a digital-to-analog converter circuit, a comparator circuit and a logic control means. The digital-to-analog circuit, under control of the logic means, accepts a reference voltage input and produces a sequence of search voltages which are compared with an unknown analog input voltage at the comparator. The resultant outputs from the comparator are applied to the control logic to determine the search voltage sequence. The digital-to-analog converter for the aforesaid circuit is provided in one embodiment employing charge-coupled-device technology. A substrate and two storage electrodes are combined to produce two potential storage wells and a transfer electrode is provided to move charge carriers between the storage wells. A reference charge packet QR is stored and divided by charge redistribution between the two potential wells to produce a sequence of charge packets of value QR/2, QR/4, QR/8, QR/16 etc. which can be selectively combined to produce analog output of a D/A converter. In the A/D converter the same sequence of charge packets is used to generate the equivalent of a binary search sequence QR/2, QR/2+/-QR/4, QR/2+/-QR/4+/-QR/8 etc. In another embodiment a bucket brigade device is provided to accomplish the same result. Because of the technique of charge redistribution wherein precise amounts of charge can be shifted in either direction between storage means, the total number of search value steps is a minimum.
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