| 摘要 |
<p>The pilot-controlled level regulator, for carrier-wave systems, has a level discriminator evaluating the pilot signal's voltage level, two counters (each consisting of flipflops) and two clocks. To prevent the regulator coming to a standstill before reaching its correct setting (as a result of the discriminator's and clocks' switching over into the quiescent state in the middle of a shortened rapid counting cycle) the auxiliary counter is provided with feedback to prevent the clock returning to its quiescent state when the auxiliary counter is executing a shortened count cycle.</p> |
