Synchronisation system for data terminals - uses phase locked loop and sample and hold circuits and input signal is integrated

摘要

The synchronization system for data processing terminals comprises a phase comparator (3) on the output of the receiver modem (1) with an input from a local oscillator (2). The comparator output is connected to a sync. separator (6) controlled from a quartz oscillator (7). The input signal is integrated (4) and passes to a sample-and-hold circuit (5) also synchronized from the separator. The output of the sample-hold circuit is connected to a shift register (8) and via a switch (11) to a second register (8'). The output of the first register feeds a bit-pattern comparator (9). At coincidence, the data is transferred to the second register, is checked for redundancy (12) and is then held in a buffer store (13) for further processing.