| 摘要 |
A frequency or speed error circuit for producing a dc. voltage which in polarity and magnitude varies according to the sense and the size of the error between a variable input frequency and a set point frequency. The period of successive cycles of the variable frequency incoming signal is digitally compared with a fixed, predetermined time interval measured off by a precision standard interval generator to produce pulses which vary in width according to the magnitude of the error. The latter pulses are treated as negative or positive when the variable period is shorter or longer than the standard time interval, and are algebraically summed by an operational amplifier having a filter to produce the dc. voltage with a magnitude corresponding to the average of the summed pulses. A deadband is created by optional devices added to the digital comparator. Infinitely fine resolution is achieved by the gating and counter components of the standard time interval generator, thereby to avoid the ambiguity of a measured standard interval possibly being other than an integral multiple of the period of precision frequency clock pulses. |
