发明名称 SWITCHING TYPE VERTICAL DEFLECTION OUTPUT CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide the switching system vertical deflection output circuit in which disturbance of vertical deflection output waveform is not caused at a switching time from a blanking period to a scanning period even when a pop up circuit is added. SOLUTION: A comparator 6 compares an error voltage from an error amplifier 2 received at its noninverting input terminal with a +V1(V) from a DC voltage source E2 fed to its inverting input terminal and provides an output of the result from its output terminal as a tentative pup up pulse D. The pulse D is fed to one input terminal of an OR circuit 8 and fed to a monostable multivibrator (M.M)7, from which a pulse E with a prescribed width t1 from its trailing ridge is generated and outputted to other input terminal of the OR circuit 8. The OR circuit 8 receiving the pulses D, E ORs them and provides an output of a pulse F to a switch circuit 11.
申请公布号 JPH09181932(A) 申请公布日期 1997.07.11
申请号 JP19950341257 申请日期 1995.12.27
申请人 TOSHIBA CORP 发明人 ITO TORU
分类号 H04N3/16;(IPC1-7):H04N3/16 主分类号 H04N3/16
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