发明名称
摘要 PURPOSE: To enlarge an interband tunnel current when applying voltage to a drain, by diffusing impurities in high concentration into a semiconductor substrate from an oxide film containing impurities in high concentration thereby forming a shrunk and retreated drain in a sharp impurity profile, with the sample at high temperature for a short time. CONSTITUTION: An SOG 107, which contains phosphor in high concentration, is applied all over the surface of a wafer, and annealing is performed with an infrared ray lamp so as to dope the inside of an n-substrate 101 with phosphor. At this time, the source region covered with an oxide film is not doped with phosphor, and only the drain region where the n-substrate 101 is exposed is doped with phosphor. Due to the annealing for a short time at high temperature, an n<+> -diffusion layer 106 adjacent to a gate polysilicon 103 is made shallowly in high concentration, and section adjacent to the gate polysilicon 103 shrinks and retreats, and the impurity profile becomes sharp. As a result, an interband tunnel current which flows when voltage is applied to the drain becomes large, and high-speed capacity of the element can be materialized.
申请公布号 JP2833500(B2) 申请公布日期 1998.12.09
申请号 JP19950003680 申请日期 1995.01.13
申请人 NIPPON DENKI KK 发明人 KAWAURA HISAO
分类号 H01L29/06;H01L29/66;H01L29/78;(IPC1-7):H01L29/66 主分类号 H01L29/06
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