发明名称 Semiconductor fabrication method for improved device yield by minimizing pipes between common conductivity type regions
摘要 A method for fabricating bipolar semiconductor devices of large scale integration in which the formation of pipes, which result in shorts or leakages between two conductivity types of the semiconductor devices, is minimized. Prior to forming the emitters in the bipolar transistors, nucleation sites for crystallographic defects such as dislocation loops are formed in the base region near its surface. The emitters are then formed in base regions containing the nucleation sites and the sites are converted into electrically harmless dislocation loops during diffusion of the emitter impurity. Preferably, the nucleation sites are formed by implanting non-doping impurities, such as helium, neon, argon, krypton, xenon, silicon, and oxygen.
申请公布号 US4069068(A) 申请公布日期 1978.01.17
申请号 US19760701789 申请日期 1976.07.02
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 BEYER, KLAUS D.;DAS, GOBINDA;POPONIAK, MICHAEL R.;YEH, TSU-HSING
分类号 H01L29/73;H01L21/265;H01L21/28;H01L21/322;H01L21/331;(IPC1-7):H01L21/26;H01L29/32 主分类号 H01L29/73
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