发明名称 VIRIABLE ACTIVE GROUP DELAY EQUALIZER
摘要 PURPOSE:The base grounded transistor circuit of which the impedance is low is connected to the output terminal of a unit active group delay equalizer to obtain the output from its collector, thereby simplifying the circuit constitution and preventing the loss of delay characteristics.
申请公布号 JPS533760(A) 申请公布日期 1978.01.13
申请号 JP19760078040 申请日期 1976.06.30
申请人 NIPPON ELECTRIC CO 发明人 FUKUSHI YUUZOU;FURUYA SENJI
分类号 H03H11/04;H04B3/14 主分类号 H03H11/04
代理机构 代理人
主权项
地址