MOS source follower circuit

摘要

A source follower circuit which exhibits essentially zero input to output voltage drop and very low capacitive loading on the input. A current mirror arrangement is used. The input is connected to the gate of a depletion mode transistor which is connected in series with an enhancement mode device. The gate of the enhancement device is biased by a series circuit having a depletion device with gate shorted to source and an enhancement device with gate shorted to drain.