发明名称 System for pretesting electronic memory locations and automatically identifying faulty memory sections
摘要 An MOS RAM read/write memory system has thirty-two 1 x 512 bit RAM memory chips arranged in a matrix. The system pretests all data bit locations for each address prior to the entry of any data into that address, and automatically skips an address having a faulty data bit location in it. In addition, the system functions, upon reading out of data information from the memory chips, to uniquely identify any faulty MOS RAM memory chip; so that it may be removed and replaced if desired.
申请公布号 US4066880(A) 申请公布日期 1978.01.03
申请号 US19760671938 申请日期 1976.03.30
申请人 ENGINEERED SYSTEMS, INC. 发明人 SALLEY, ERNEST J.
分类号 G06F12/16;G06F11/22;G11C11/02;G11C29/00;G11C29/20;G11C29/44;(IPC1-7):G11C29/00;G06F11/00 主分类号 G06F12/16
代理机构 代理人
主权项
地址