发明名称 |
Circuit combining bipolar transistor and JFET{3 s to produce a constant voltage characteristic |
摘要 |
A pair of FET's are coupled in series between the emitter and collector of a bipolar transistor and the juncture of the FET's coupled to the bipolar transistor base. The FET gates are coupled to the bipolar transistor collector. When a current is passed through the emitter-collector terminals in excess of a threshold value, a constant voltage will appear over a substantial current range. The constant voltage is related to FET Vp and can be used to compensate or track integrated circuits that contain both FET's and bipolar transistors.
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申请公布号 |
US4066917(A) |
申请公布日期 |
1978.01.03 |
申请号 |
US19760682290 |
申请日期 |
1976.05.03 |
申请人 |
NATIONAL SEMICONDUCTOR CORPORATION |
发明人 |
COMPTON, JAMES B.;OCHI, SAM S. |
分类号 |
G05F3/20;H01L27/07;(IPC1-7):H01L29/80;H01L27/02;H03K17/60 |
主分类号 |
G05F3/20 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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