发明名称 Coin selector employing logic gates - with programmed passive memory storing limit values of valid coins
摘要 <p>The coin selector employs a coin detector, which supplies an output signal dependant on the dia. and metal composition of the coins. The output signal is supplied to an AND gate (3), via an A/D converter if the output signal is in analogue form, the other input of the AND gate (3) coupled to a clock pulse generator (4). The recorded count value of a counter (5) coupled to the output of the AND gate (3) is stored by a register (6). A programmed passive memory (7) stores the limit values of valid coins and receives the information from the register (6), to supply a signal representing the coin characteristics to an output register (10). Pref. a logic comparator (8) and a logic circuit (9) are also included.</p>
申请公布号 FR2353910(A1) 申请公布日期 1977.12.30
申请号 FR19760016633 申请日期 1976.06.02
申请人 AFFRANCHISSEMENT TIMBRAGE AUTOMA 发明人
分类号 G07D3/00;(IPC1-7):07D3/00 主分类号 G07D3/00
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