发明名称 METHOD OF FORMING MASK FOR INTEGRATED CIRCUIT PATTERN
摘要 <p>The LSI photomask is prepared from a master which represents the basic unit cells (I, II, III, IV) which assemble into the full array. Only part of the cut and strip original has to be prepared while the first reduction of 10:1 can use normal process cameras without going to extra large plates. The final reduction, also of 10:1, uses a step and repeat process in which the unit cells are assembled into the chip matrix. The system is used for integrated circuit array with repetitive patterns. The large chip size would otherwise require extra large master plates and complex cameras. The edges of the chip, with the inter chip boundaries are allowed for in the special step and repeat command programme.</p>
申请公布号 JPS52155976(A) 申请公布日期 1977.12.24
申请号 JP19770071952 申请日期 1977.06.17
申请人 THOMSON CSF 发明人 DANIERU WATSUSON
分类号 G03F1/00;G03F1/08;G03F7/20;H01L21/027 主分类号 G03F1/00
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