High speed modular arithmetic apparatus having a mask generator and a priority encoder

摘要

In a high speed arithmetic apparatus, the tally coded output of a modular mask generator addressed by a binary first operand and the tally coded input of a priority encoder are joined together by an interconnecting apparatus. The interconnecting apparatus is responsive in form to a second operand and to a selected arithmetic operation to provide at the output of the priority encoder the binary resultant of the selected operation executed upon the first and second operands. The interconnecting apparatus is disclosed in its simplest embodiment as fixed hardwired connections and in its most sophisticated embodiment as a dynamically microprogrammable full crossbar network.