| 发明名称 |
INTEGRATION CIRCUIT LOGIC SYSTEM |
| 摘要 |
PURPOSE:To enable parity chaeck of 1-bit with a plural number of IC's, by changing the internal control of IC, thru the use of the signal indicating the processing of the parity bit to the IC's having the identical logical constitution and which are controlled by the identical control signal. |
| 申请公布号 |
JPS52143724(A) |
申请公布日期 |
1977.11.30 |
| 申请号 |
JP19760060006 |
申请日期 |
1976.05.26 |
| 申请人 |
HITACHI LTD |
发明人 |
KATOUNO KUNIJI;IWAMOTO SHIYOUJI;ASANO MICHIO;CHIBA TSUNEYA |
| 分类号 |
G06F11/10;G06F7/00;G06F11/00;H03K19/00 |
主分类号 |
G06F11/10 |
| 代理机构 |
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代理人 |
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| 地址 |
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