发明名称 Leakage current compensation with reference bit line sensing in non-volatile memory
摘要 A non-volatile memory includes a sense amplifier that uses a reference bit line. The sense amplifier includes a first capacitor coupled to a selected bit line and a second capacitor coupled to a reference bit line. The reference capacitor compensates for displacement currents in the selected bit line during sensing. Both plates of the capacitors are utilized to cancel leakage currents. The top plates of the capacitors are precharged then discharged during a sense phase. The selected bit line capacitor is discharged based on the selected cell current and the leakage current. The amount of discharge is transferred to the bottom plate of each capacitor, followed by discharging the bottom plates. The capacitor for the selected bit line is discharged based on the leakage current. In this manner, the correction phase facilitates a compensation based on the leakage current so that the selected cell current can be determined.
申请公布号 US9390793(B1) 申请公布日期 2016.07.12
申请号 US201514663786 申请日期 2015.03.20
申请人 SanDisk Technologies LLC 发明人 Nigam Anurag;Chen Yingchang
分类号 G11C7/00;G11C13/00 主分类号 G11C7/00
代理机构 Vierra Magen Marcus LLP 代理人 Vierra Magen Marcus LLP
主权项 1. A non-volatile storage system, comprising: a sense amplifier including a first output selectively coupled to a selected bit line and a second output selectively coupled to a reference bit line; a first capacitor including a first plate selectively coupled to the first output and a second plate selectively coupled to the first output, the first plate of the first capacitor is selectively coupled to a voltage supply; a second capacitor including a first plate selectively coupled to the second output and a second plate selectively coupled to the second output, the first plate of the second capacitor is selectively coupled to the voltage supply; and an operational amplifier having a first input that is selectively coupled to the first plate of the first capacitor and a second input that is selectively coupled to the first plate of the second capacitor.
地址 Plano TX US