发明名称 Semiconductor device package and method of manufacturing the same
摘要 A semiconductor package includes a substrate, a set of electrical components, a stud, a tapering electrical interconnection and a package body. The electrical components are disposed on a top surface of the substrate. A bottom surface of the stud is disposed on the top surface of the substrate. A bottom surface of the electrical interconnection is disposed at a top surface of the stud. A width of the stud is greater than or equal to a width of the bottom surface of the electrical interconnection. The package body is disposed on the top surface of the substrate, and encapsulates the electrical components, the stud and a portion of the electrical interconnection. The package body exposes a top surface of the electrical interconnection.
申请公布号 US9397074(B1) 申请公布日期 2016.07.19
申请号 US201514700079 申请日期 2015.04.29
申请人 Advanced Semiconductor Engineering, Inc. 发明人 Lee Wei-Hsuan;Li Sung-Mao;Liu Chien-Yeh
分类号 H01L23/48;H01L25/065;H01L23/498;H01L23/31;H01L21/48;H01L21/56 主分类号 H01L23/48
代理机构 Foley & Lardner LLP 代理人 Foley & Lardner LLP ;Liu Cliff Z.;Murch Angela D.
主权项 1. A semiconductor device package, comprising: a first substrate having a top surface; a first set of electrical components disposed on the top surface of the first substrate; at least one stud having a top surface and a bottom surface, the bottom surface of the stud disposed on the top surface of the first substrate; a tapering electrical interconnection having a top surface and a bottom surface, the bottom surface of the electrical interconnection being disposed at the top surface of the stud, a width of the stud is greater than or equal to a width of the bottom surface of the electrical interconnection; and a first package body disposed on the top surface of the first substrate, encapsulating the first set of electrical components, the stud and a portion of the electrical interconnection, the first package body exposing the top surface of the electrical interconnection.
地址 Kaohsiung TW