Phase lock loop carrier generator for receiver of phase modulated carrier pulse signals

摘要

Demodulator for phase modulated carrier pulse signals or phase codes in which the pulses are coded according to a plurality of N phases of the carrier. It comprises a digital phase lock loop system for locking to a frequency equal to N times the carrier frequency which includes at least a two input phase detector, a loop integrator and a voltage controlled oscillator having an output connected to the first input of the phase detector, means for dividing by N the frequency of this oscillator and for generating a reference carrier signal. The phase codes are decoded by comparing the phases of the carrier of the phase codes to the phase of the reference signal. In order to derive from all the phase codes a train of synchronous pulses a multiphase shifter receives the carrier of the phase codes and locally generates a plurality of carriers having phase shifts equal to 0, 2 pi /N, 2x2 pi /N, . . . ([N/2]- 1) x2 pi /N with respect to the carrier of the received phase code and means are provided for generating passing through zero pulses coinciding with the passage through zero of said received and locally generated carriers. Those of said passing through zero pulses which occur during the central part of each phase modulated carrier pulse are gated through gating means. These gated passing through zero pulses are applied to the second input of the phase detector.