System and method of power control for embedded systems without advanced configuration and power interface (ACPI)

摘要

A system for power control includes a power supply having a power supply line and a standby power line, a logic circuit having a first output terminal connected to the power supply and three input terminals, a processing device connected to the standby power line and the power supply line, and a power switch. The processing device includes at least one processor, a storage storing a code executable by the processor, and four input/output (I/O) interfaces. A first, second and third I/O interfaces of the processing device are electrically connected to a first, second and third input terminals of the logic circuit, and a fourth I/O interface is connected to the third I/O interface. The power switch electrically connects or disconnects the standby power line to the first I/O interface and the first input terminal. The processing device has a power on state, a power off state, and a suspend state.

主权项

1. A system for power control, comprising:
a power supply, having a power supply line and a standby power line; a logic circuit having a first input terminal, a second input terminal, a third input terminal, and a first output terminal electrically connected to the power supply; a processing device electrically connected to the standby power line and the power supply line, the processing device comprising:
at least one processor;a storage storing a computer executable code executable by the at least one processor;a first input/output (I/O) interface electrically connected to the first input terminal;a second I/O interface electrically connected to the second input terminal;a third I/O interface electrically connected to the third input terminal; anda fourth I/O interface electrically connected to the third I/O interface; and a power switch configured to switchably electrically connect the standby power line to the first I/O interface and the first input terminal or to electrically disconnect the standby power line from the first I/O interface and the first input terminal, wherein:
when the power switch electrically connects the standby power line to the first I/O interface and the first input terminal, the first I/O interface and the first input terminal respectively receives a high input value; andwhen the power switch electrically disconnects the standby power line from the first I/O interface and the first input terminal, the first I/O interface and the first input terminal respectively receives a low input value; wherein the logic circuit is configured to:
in response to receiving the high input value from at least one of the first, the second and the third input terminal, drive a low output value to the power supply via the first output terminal; andin response to receiving the low input value from each of the first, the second and the third input terminal, drive a high output value to the power supply via the first output terminal; wherein the power supply is configured to:
provide power to the standby power line;in response to receiving the low output value from the logic circuit, provide power to the power supply line; andin response to receiving the high output value from the logic circuit, cut off power to the power supply line; wherein the processing device is configured to:
in response to receiving power from the power supply line, switch to a power on state, and execute the computer executable code at the processor; and wherein the computer executable code, when executed at the processor, is configured to:
drive a high value as the high input value to the second I/O interface when the processing device is in the power on state; andin response to receiving the high input value from the first I/O interface, drive a low value as the low input value to the second I/O interface, and control the processing device to switch to a power off state.