| 发明名称 |
WIDEEBAND PHASE LOCKED LOOP CIRCUIT |
| 摘要 |
PURPOSE:To realize high-speed esponse without giving time constant to the feedback route and to secure a wide-band lock range by having the same rate of the feedback amount over the full range of the input signal frequency. |
| 申请公布号 |
JPS52129358(A) |
申请公布日期 |
1977.10.29 |
| 申请号 |
JP19760045374 |
申请日期 |
1976.04.23 |
| 申请人 |
TOKYO SHIBAURA ELECTRIC CO |
发明人 |
KIRA EIJI;ENDOU KENJIROU |
| 分类号 |
H03L7/113;H03L7/10;H04L7/033 |
主分类号 |
H03L7/113 |
| 代理机构 |
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代理人 |
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| 地址 |
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