| 摘要 |
<p>The data processor handle several sets of data having the same format and different priorities. A data input circuit supplies a number of priority interrupt signals to memory means, with the inputs of a priority circuit connected to the memory means. This priority circuit allows passage of selected interrupt signals which are supplied to further memory means, which control means for supplying a general interrupt signal to the processor. The first memory means for the priority interrupt signals, include means for blocking the cyclic data reading means for the data source with the same priority level as the received priority interrupt signal.</p> |
