Dual slope analog to digital converter with delay compensation

摘要

An improved bi-polar dual slope analog to digital converter having an automatic zero offset correction circuit using a high gain D.C. amplifier inserted between the output of the integrating amplifier and the input of the comparator amplifier, having both positive and negative reference potentials, and having a delay compensation circuit, for compensating delay produced by circuit elements in the signal path, coupled between the reference potentials and an input of the integrating amplifier.