发明名称 REDUCTION OF DIELECTRIC ISOLATION CAPACITANCE COUPLING
摘要 <p>An intgrated semiconductor module is built in a single crystal silicon island and has the elements separated in the substrate by dielectric insulation. At least one part of the substrate has a low electrical resistance and an earth contact is connected to the low resistance zones. These zones are of the opposite type conductivity to that of the single crystal silicon island. This type of module reduces the capacitive coupling between the circuit elements in the high frequency wide band range. It is suitable for use in telecommunication systems in wide band applications eliminating the phenomenon of cross talk in the lines.</p>
申请公布号 CA1017875(A) 申请公布日期 1977.09.20
申请号 CA19740212875 申请日期 1974.11.01
申请人 HITACHI, LTD. 发明人 KUSANO, MASAAKI;OHHINATA, ICHIRO;OKUHARA, SHINZI
分类号 H01L21/762;H01L23/535 主分类号 H01L21/762
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