发明名称 Planar integrated circuit with at least one layer of contacts - uses two different insulating layers for selective removal by etching agent
摘要 <p>The planar type integrated circuit has on one active face of a semiconducting chip at least a first bed of first-insulating material. During mfr. a window is formed in the insulating material. This window is designed for the formation and connection of active and passive elements of the integrated circuit. The first bed is covered by an intermediate protection layer of second insulating material, and an aperture is formed in the layer. A third layer of a different insulating substance to the second is deposited. This third layer (a) is is susceptible to attack by an agent which remain inactive with respect to the second material. By means of a mask and the agent an opening is created in the third layer. The opening clears at least on a part of the periphery of the aperture, an area of the second material. Afterwards a metallic film is deposited on the chip. Then after eliminating the mask, sheets of the metallic film are removed from the mask.</p>
申请公布号 FR2341944(A1) 申请公布日期 1977.09.16
申请号 FR19760004759 申请日期 1976.02.20
申请人 RADIOTECHNIQUE COMPELEC 发明人 JEAN-PIERRE RIOULT, RAYMOND FABIEN ET MICHEL DE BREBISSON;FABIEN RAYMOND;BREBISSON MICHEL DE
分类号 H01L21/311;H01L21/768;(IPC1-7):01L21/88 主分类号 H01L21/311
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