发明名称 CHARGING AND DISCHARGING CONTROLLING CIRCUIT
摘要 PURPOSE:To allow a capacitor to discharge all the charged electric charge carrier within the generation period of pulse signal by discharging charged voltage to the 1st level for clamping and by making it possible to clamp the reference voltage to the 2nd level less than the 1st level. CONSTITUTION:This circuit is equipped with the 1st clamp circuit 38 to lower the charged voltage down to the 1st level and the 2nd clamp circuit 44 to lower the reference voltage down to the 2nd level less than the 1st level, etc. The 1st clamp circuit 38 is composed of two-stage diodes 39 and 40 and a transistor 41, the collector-emitter of which is connected in parallel to a capacitor 27. The 2nd clamp circuit is composed of a diode 45 and a transistor 46, the collector-emitter of which is connected to a series resistance 30 in parallel. The charged voltage is thus clamped to the 1st level and the reference voltage to the 2nd level.
申请公布号 JPH0322893(A) 申请公布日期 1991.01.31
申请号 JP19890157368 申请日期 1989.06.20
申请人 SANYO ELECTRIC CO LTD 发明人 YOSHITOMI TETSUYA
分类号 H02P6/08 主分类号 H02P6/08
代理机构 代理人
主权项
地址