MOS ONE TRANSISTOR CELL RAM HAVING DIVIDED AND BALANCED BIT LINES, COUPLED BY REGENERATIVE FLIP-FLOP SENSE AMPLIFIERS, AND BALANCED ACCESS CIRCUITRY,申请号US19760676066-传众专利搜索

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发明名称	MOS ONE TRANSISTOR CELL RAM HAVING DIVIDED AND BALANCED BIT LINES, COUPLED BY REGENERATIVE FLIP-FLOP SENSE AMPLIFIERS, AND BALANCED ACCESS CIRCUITRY
摘要
申请公布号	US4045783(A)	申请公布日期	1977.08.30
申请号	US19760676066	申请日期	1976.04.12
申请人	STANDARD MICROSYSTEMS CORPORATION	发明人	HARLAND, ROBERT FRANCIS
分类号	G11C5/02;G11C11/4097;(IPC1-7):G11C11/40	主分类号	G11C5/02
代理机构		代理人
主权项
地址

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