发明名称 Semiconductor memory
摘要 A random access type semiconductor memory comprises a pair of data line halves arranged in parallel, a plurality of word lines orthogonal to the data line halves, a multiplicity of memory cells, each of which is arranged at either one of the cross points between the data line halves and each of the word lines, a differential amplifier to which signals on the data line halves are differentially applied, and a main amplifier to which output signals on the data line halves are differentially applied, thereby detecting the content of a desired memory cell.
申请公布号 US4044340(A) 申请公布日期 1977.08.23
申请号 US19750645306 申请日期 1975.12.29
申请人 HITACHI, LTD. 发明人 ITOH, KIYOO
分类号 G11C11/401;G11C5/02;G11C11/404;G11C11/4096;G11C11/4097;H01L27/10;H01L27/108;(IPC1-7):G11C11/40 主分类号 G11C11/401
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