| 摘要 |
<p>PURPOSE:To increase the charging capability of a level of a bit line by providing an N-channel MOS transistor (TR) whose gate connects to an output of a reference voltage generating circuit brought into the operating state for a prescribed time and whose drain connects to a power supply. CONSTITUTION:An N-channel MOS TR Q6 whose gate connects to an output F of a reference voltage generating circuit 3 brought into the operating state for a prescribed time and whose drain connects to a power supply is provided. When a bit line is selected by signals a1, a2 first of all, N-channel TRs Q3, Q6 charge the bit line to a prescribed level through N-channel TRs Q4, Q5. In this case, the TRs charging the bit line are not only the N-channel TR Q3 but only the N-channel TR Q6, then the charging of the bit line is quickened by the TR Q6. Thus, the bit line charging time is reduced.</p> |
