发明名称 LSI TEST CONTROL CIRCUIT
摘要 PURPOSE:To attain the reduction of the scale of an LSI test control circuit by inputting a test signal to limit the jump signal, and shifting the execution of a normal action program to the execution of a test program stored in a memory. CONSTITUTION:An address program of a memory 111 which is shown by a pointing means 113 is read out and store din an instruction store means 115. If this stored program is equal to a jump instruction, a jump signal transmission means 117 outputs a jump signal. A limit means 119 limits the output of the jump signal as long as a test signal is supplied. In such a case, a selection means 123 including no input jump instruction selects an address where an addition means 121 added the prescribed value to an address of the means 113 and sets the selected address to the means 113. Thus a test program stored in the memory 111 can be carried out, therefore no test pin, etc., are required. Then the scale of an LSI test control circuit can be reduced.
申请公布号 JPH0338733(A) 申请公布日期 1991.02.19
申请号 JP19890173765 申请日期 1989.07.05
申请人 FUJITSU LTD 发明人 HASEGAWA KENZO;YOSHIDA KAZUHIRO
分类号 G06F11/22 主分类号 G06F11/22
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