A signal analyzer system is disclosed which includes an arithmetic processor containing a plurality of pipeline processor elements in parallel array with each element connected to a respective working store, with all of the elements being under microprogram control of an arithmetic element controller.
申请公布号
US4041461(A)
申请公布日期
1977.08.09
申请号
US19750599306
申请日期
1975.07.25
申请人
INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人
KRATZ, GARY L.;SPROUL, III, WILLIAM W.;WALENDZIEWICZ, EUGENE T.;WALLIS, DONALD E.;DENNIS, CHARLES A.
