| 摘要 |
An ordered array of semiconductor integrated circuit feedback delay type of phase-locked recursive oscillators is arranged to furnish a correspondingly ordered discrete spectrum of mutually different resonant frequencies. The individual feedback path in each of the oscillators contains a semiconductor charge transfer device for providing most of the feedback delay. The total feedback delay in each of the oscillators is fine-tuned in the feedback path of each oscillator by a different incremental time delay element, such as an RC time delay element, which introduces an added delay that is less than that of a single transfer cycle in the charge transfer device. A phase-locking signal is fed to every oscillator, all the locking signals being derived from, and thus coherent with, a single master clock. All of the charge transfer devices are driven by a single clock pulse train whose timing can also be advantageously controlled by the master clock. Such an array of oscillators can be integrated in a single semiconductor chip, for use in a channel bank filter operating on heterodyne principles, for example.
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