发明名称 COMMUNICATIONS SYSTEMS
摘要 <p>1481108 Data transmission; stations connected on a loop WESTERN ELECTRIC CO Inc 22 July 1974 [25 July 1973] 32338/74 Heading H4P A plurality of transceiving terminals 2a &c. are connected to separate primary and secondary transmission paths together with a base terminal 1 having a means responsive to a reception fault on the primary path which inhibits transmission of signals on the secondary path and a second means responsive to a reception fault on the secondary path operating reversely. Both means may be operable simultaneously. In the embodiment described, the primary and secondary paths are each arranged in a loop, direction of transmission normally being opposite in the two paths. Means are incorporated so that in the event of a fault, incoming signals are re-routed to the other path. Transmitting terminals 2 are connected, with base terminal 1, by primary and secondary loops 3, 4 divided into sections a, b, &c. Data is transmitted from terminal 1 in time divided frames commencing with a sync. pulse followed by time slots unique to each terminal i.e. 2a &c. any form of modulation, e.g. pulse width being employed. Each terminal 2 extracts data appearing in its unique slot and refills the vacated slot with signals destined for terminal 1. In the absence of faults on paths 3, 4, signals on path 4 are transmitted from terminal to terminal unchanged by passage through any terminal 2. Line pairs 5a-5d may be public network trunk lines connected to a central office; line pair, e.g. 5a may be allocated exclusively to terminal 2a &c. Separate fault detectors (10, 11, Fig. 2, not shown) monitor reception on primary and secondary paths i.e. when data is not received for a determined interval a 1 fault signal is given. If a primary fault is indicated on path 3c into terminal 2c, secondary path 4c is disabled and incoming signals on 4b are placed into a data extraction and insertion circuit (12) for passage to a utilizing device, and signals from such device are placed in (12) from transmission over line 3d. A reverse process will also occur to re-rout signals on a secondary path fault. A 1 pulse signal equal to 2 gate delays is applied to the secondary line inhibited which is used to reset circuitry in a terminal the other side of the faulty primary path. Fault detectors in terminals 2 have a greater delay than those in base terminal 1 hence the latter react sooner and the faults on 3c causes cessation of secondary transmission from 1 in addition to the operations in 2c described above. Terminal 2d also reacts similarly. To ensure proper gating of signals received on lines 3, 4 a test transmission is periodically initiated.</p>
申请公布号 GB1481108(A) 申请公布日期 1977.07.27
申请号 GB19740032338 申请日期 1974.07.22
申请人 WESTERN ELECTRIC CO INC 发明人
分类号 H04L1/22;G06F13/00;H04B17/40;H04L12/437;H04M9/02;(IPC1-7):04L11/16 主分类号 H04L1/22
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