Halbleitervorrichtung und Verfahren zu ihrer Herstellung

摘要

1276682 Semi-conductor devices HITACHI Ltd 8 Sept 1969 [11 Sept 1968] 44372/69 Heading H1K. Cooling of a planar semi-conductor device chip face bonded to a conductive pattern on an insulating or insulation-coated substrate is facilitated by fixing a plate of larger superficial area than the chip to the exposed face of the chip via an intermediate member having a thermal conductivity superior to that of air. In the example illustrated in Fig. 1 the plate 3 is spaced from the ceramic substrate 4 by ceramic frame 2 soldered between it and the recessed base 1 to which the substrate is soldered. Typically the chips each include a transistor or a combination thereof with diodes, resistors, and capacitors and further film resistors or capacitors may be disposed on the substrate. The intermediate members are copper balls (or discs, cores, or hemispheres) 7 soldered to individual chips and subsequently soldered to the cooling plate, and the face bonding may involve use of ultrasonic welding, solder balls pedestals and/or beam leads. Alternatively the chips at the time of ball bonding are parts of a single wafer. In another arrangement a single intermediate member is bonded to a vapour deposited layer on the wafer and later subdivided with it. Flow of solder over the chips is limited by a surface layer of silica or silicon nitride. In modified forms plate 3 is outwardly dished or a separate dished member used which is soldered to the balls and attached to the plate by an elastic material such as silicone rubber or foamed resin filled with thermally conductive powders such as beryllia or alumina. Heat dissipation can be further enhanced by filling the casing with silicon oil. Where a separate dished member is used thermal stress is relieved by leaving it floating relative to plate 3 or attaching it to frame 2 via a sinuous flexible diaphragm. Otherwise the intermediate members may be of soft metal, sponge metal or the aforesaid filled elastomers or of sinuous flexible form. Flexible beam leads on the chips also help to absorb stress. As an alternative to solder a pressure contact may be used between the intermediate members and the chips or cooling plate with an intervening layer of tin, lead or silicon oil. Suitable materials for plate 3 are ceramics such as beryllia or metals. In the latter case a metallized silica or silicon nitride layer may be formed on the chips to afford electrical insulation. Techniques for face bonding the chips to the substrate are described with reference to Figs. 3 and 4 (not shown). External connections 10 may form strip line feeders with plate 3 earthed.