| 摘要 |
<p>PURPOSE: To prevent the malfunction of a circuit by providing a means, which reduces the frequency of a clock in the case of reduction of a supply voltage to a prescribed threshold or lower, to make the circuit appropriately function during a transient stage. CONSTITUTION: A detector DET compares a supply voltage Vcc and a reference voltage Vref with each other, and the output of the detector DET is inputted to a logic circuit CL capable of starting/stopping the operation of a frequency divider DIV through a register REG. When the supply voltage Vcc is normal, the frequency divider DIV is not operated, and a clock CLK receives the frequency from an oscillator OSC; but if the supply voltage Vcc is insufficient, the clock CLK receives the frequency from the frequency divider DIV, and the frequency divider DIV receives the frequency of the oscillator OSC. Consequently, the operation frequency of an integrated circuit CI is adapted to the actual level of the supply voltage Vcc. Thus, the operation of the circuit is managed more effectively when the supply voltage is abnormally low.</p> |
