发明名称 Partial amendment of stored data - using logic circuit transferring part of bit sequence between registers
摘要 <p>A circuit transfers any number of successive bits of an n-figure bit sequence from one register to another by means of gating circuits. For the transfer of bit positions at the end or the start of a bit sequence a decoder (D,D) with n outputs is provided which, be decoding one of the first bit address (ADR) gives a marker bit at the output corresponding to this bit. A logic element (O or U) is allocated to each of the n outputs which links the output signal of the decoder with the logic element associated with the next lowest output so that, according to the marker bits, the logic elements give output signals to prepared the transfer of the bit sequence. Each place of the second register (B) is connected to the output of an AND gate (U) which links the bit of the associated place in the first register (A) with the output signal of the corresponding logic element.</p>
申请公布号 DE2233164(B2) 申请公布日期 1977.07.14
申请号 DE19722233164 申请日期 1972.07.06
申请人 发明人
分类号 G06F7/76;G06F12/04;(IPC1-7):11C9/02 主分类号 G06F7/76
代理机构 代理人
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