| 摘要 |
A detector for detecting predetermined digital words within a train of signals wherein the digits in the words each have a predetermined time period. The detector continuously samples the train of signals coupled thereto. Samplings are taken a number of times during the interval of a digit time period, and a digital signal corresponding to the sampled signal for each sample taken is stored in a multi-stage storage register. Comparison circuitry compares the digital signals in the storage register with a first predetermined word in a memory circuit. If there is a correlation, the comparison circuit counts for a time period long enough to sample the train of signals and store a new series of signals corresponding to a second digital word. The comparison circuit compares these second digital signals with a second word in the memory circuit. A correlation between theset two words produces a detection signal. |
