| 摘要 |
PURPOSE:To reduce a cost with a comparative small memory capacity and to improve the pull in setting characteristic by providing a serial/parallel conversion section, a frame counter, a register group, a synchronous bit detection section and a discordance detection section, etc. CONSTITUTION:A register group 39 uses a serial/parallel conversion section 35 to stores an n-bit parallel signal at a specific location in inputted signals 9 converted into n-bit parallel signals by number of multi-frames (m) at every frame. Moreover, a synchronous bit detection section 15 decodes an m-bit parallel signal in the same bit location in the direction of the multi-frame outputted from the group 39 to discriminate whether or not the pattern is coincident with an expected synchronous pattern. Then a discordance detection section 19 shifts the phase of a frame counter 1 and a multi-frame counter 5 by n-bit when a signal pattern coincident with the synchronous pattern is not detected from any of n-set of m-bit parallel signals stored in the group 39 by the detection section 15 and repeats the operation sequentially. Thus, the memory capacity is reduced, the cost is reduced and the pull in setting characteristic is improved. |
