| 摘要 |
<p>1444216 Digital - to - analogue conversion STANDARD TELEPHONES & CABLES Ltd 20 Feb 1975 7157/75 Heading H3H An analogue output is derived from a P.C.M. signal by increasing its sampling rate in interpolator 1, converting only the most significant bits to a pulse density signal in a rate-multiplier 3, and low-pass filtering 4 to give the analogue output. Noise is reduced by feeding back the least significant bits through a filter 12. The filter may comprise one or more delays whose outputs are combined with different weighting factors: several examples are described, Figs. 4, 8, 10, 11, not shown. The interpolator may be simply a recirculating register, Fig. 6, not shown, for merely repeating each P.C.M. word, e.g. 32 times or may be a linear interpolator, Fig. 7, not shown. D-to-A converter 3 comprises a synchronous binary counter 5, Fig. 2, fed with fast clock pulses fc, binarily weighted frequencies being obtained at its outputs A, B, C, D which are gated by the 4 most significant bits of the interpolated P.C.M. signal to produce a pulse train E of mean density corresponding to these 4 bits.</p> |
