摘要 |
<p>The switching transistor generates an output power signal oscillating at a specified frequency between two specified levels. Two timers generate signals determining two test intervals during sections of opposite half-periods. Output signal levels are monitored by two logic circuits, which, when a deviation is detected from one of the two levels during both test intervals, deliver a fault signal. The logic circuits consist of first AND circuits to which one timing signal and output signal are applied; second AND circuits to which the second timing signal and inverted output signal are applied, and third gates connected to the outputs of the above AND circuits.</p> |