发明名称 Phase locked loop circuit
摘要 A phase locked loop circuit comprises a phase comparator having an operation range with specific limits for phase comparing. A voltage-controlled oscillator produces an output at the output of the phase locked loop. At the same time, the oscillator output is fed to the phase comparator. A detector circuit, supplied with the output of the phase comparator, detects any exceeding of a specific limit of the phase by comparing the operation range of the phase comparator with a phase deviation of the oscillator output signal fed to the phase comparator. The detector produces an output correction voltage. An adder circuit adds this output correction voltage and an output error voltage of the phase comparator and supplies the resulting added voltage, as a control voltage, to the voltage-controlled oscillator. This phase locked loop operates in a state wherein the lock range thereof has been equivalently expanded by the correction voltage.
申请公布号 US4027274(A) 申请公布日期 1977.05.31
申请号 US19750589546 申请日期 1975.06.23
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 FUKUI, KIYOTAKE;MATSUSHIMA, HIROSHI;ISHIGAKI, YUKINOBU
分类号 H03L7/10;H03L7/14;(IPC1-7):H03C3/06 主分类号 H03L7/10
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