Circuit for generating synchronization signals

摘要

A circuit for generating synchronization signals from a digital data pulse train having a bit period T and conveying pulses in non-return-to-zero form. The circuit comprising (i) a rectifier device arranged to fullwave rectify the digital data pulse train, (ii) an oscillatory circuit tuned to oscillate with period T and stimulated by the transitions of a waveform produced by the fullwave rectifier device and (iii) a peak detector arranged to produce a bias signal which is proportional to the amplitude of the output of the oscillatory circuit. The bias signal being active upon the fullwave rectifier device to stabilize the amplitude of the waveform produced by the oscillatory circuit.