| 摘要 |
<p>1474197 Automatic control of sewing machines SINGER CO 13 June 1974 [5 July 1973] 26197/74 Heading G3N A multiple pattern sewing machine includes a memory containing each pattern as a plurality of sequentially grouped digital code words, each word corresponding to a stitch in the pattern and each group having a unique starting address, pattern solution means including a counter operable to apply an addressing signal to the memory and subsequently to re-address the memory each time a machine derived pulse is received whereby a sequence of code words is read out corresponding to the selected pattern to operate the stitch forming apparatus of the machine to produce that pattern. In the arrangement shown the output from the read only memory 92 consists of a 10 bit word of which the first five bits control the needle bight actuators 30 and the second five bits control the material feed actuators 43. The memory is addressed by a counter 93 which is clocked by movement of the needle driving armshaft to sequentially advance the read-out from the memory. The bight and feed movements for each stitch of a pattern are stored in the memory at a sequence of addresses starting at a specific address and finishing with a resetting word, 11111 in the described embodiment, which acts through AND gate 135 and OR gate 137 to reset the address counter. The pattern is selected by manually operated contacts 50-53 which, by the action of NAND gates 55, 57, 60 puts a selected energization on lines 70, 71 to be maintained on lines 72, 73 by latch 69 until a different pattern contact is operated. The energization on lines 72, 73 is translated in address memory 91 into an 8 bit binary code which causes the address counter to output a 9 bit binary code word corresponding to the address of the starting stitch in the selected pattern. The address counter then steps on in synchronism with the needle operation until the pattern is completed and the reset signal appears. Since the lines 72, 73 are still energized the same code will exist at the output of address memory 91 and so the memory 92 will be addressed to the start of the same pattern which will repeat. The resetting arrangement may be modified by including a comparator to determine the pattern end code.</p> |
