Long duration electronic delay circuit - uses PNPN device pulse generator providing triggering for discharge loop

摘要

The delay circuit provides an output tens of minutes after triggering. The design is intended to overcome the problems associated with large capacitances in orthodox CR delay circuits. The circuit is based on the use of a capacitance charging through two series resistors (35,37) and two diodes (34,38), the chain being connected directly across a half wave rectified supply. A pulse generator based on a PNPN device or DIAC (41) provides triggering for the discharge loop via a further PNPN device (39) fed from an NPN transistor, (40) both the pulse rate and delay being variable such that operation of the PNPN device can be at a low voltage, high current point on the v/I characteristic.