BLOCK DIGITAL PROCESSOR FOR USE WITH NONUNIFORMLY ENCODED DIGITAL WORDS

摘要

A digital processor apparatus is described which operates upon nonuniformly encoded digital words each one of which has mu -law encoded format of a sign bit to indicate polarity, segment bits to indicate range, and interval bits to indicate the location of the sample within the segment. A predetermined number of the digital words is stored in shift registers while the apparatus determines the maximum segment value represented in that block of predetermined number of words. The interval bits for one of the stored digital words are stored in a shift register along with a bit whose value is determined from the segment bits for that word. This shift register is then shifted by an amount which is dependent on the difference between the segment value for the digital word under consideration and the maximum segment value for that block of digital words. Before the next digital word is processed, the processed digital word in the shift register which has fewer bits than the original digital word is coupled into a digital multiplexer for transmission to a receiving location. The processed digital words are preceded in the transmission by the maximum segment value for the block of digital words. At the receiver, the maximum segment value is utilized by a receiving processor to reconstruct each of the processed digital words into a digital word compatible with the nonuniform encoding law from which the input samples were drawn.