| 摘要 |
PURPOSE:To widen a lock range by providing a hysteresis comparator, plural inversion detection circuits and a timer circuit, detecting a frequency difference between an input signal and a clock to control a voltage controlled oscillator. CONSTITUTION:An input signal is inputted to a comparator 1 and also a hysteresis comparator 6. Then an output of the comparator 5 is inputted to inverse detection circuits 6 (for 2T or below) and 7 (for 12T or over) (T is one period of a read clock), where the inversion of 2T or below and of 12T or over is detected. Then the detection outputs are outputted to a voltage controlled oscillator 4 via timer circuits 8, 9 to control the oscillator 4. In such a case, output signals from the circuits 8, 9 represent the frequency difference between the input signal and the clock, and the inverse detection signal in excess of the maximum difference controls the oscillator 4 to decrease the oscillating frequency and the inverse detection signal less than the minimum difference controls the oscillator 4 to increase the oscillating frequency. Then the normal lock state is always attained to widen the lock range, thereby expanding the data transmission speed range. |
