发明名称 DEAD TIME COMPENSATOR FOR INVERTER
摘要 PURPOSE:To prevent a phase short circuit by measuring an ideal gate signal, output phase voltage of an inverter, a current direction by a counter, detecting the direction of the current, measuring difference between the gate signal and the phase voltage, and delaying the phase voltage by the dead time. CONSTITUTION:An AC power source AC, a converter 1, an inverter main circuit 2 and a motor M are connected, and the motor M is driven and power regenerated. A phase voltage detecting comparator 3 detects the phase voltage signals Vu-Vw of the inverter 2. Ideal gate signals U-W from a PWM generator 4 are input to a dead time compensator 5 together with the signals Vu-Vw. The compensator 5 measures, determines positive or negative of phase currents Iu-Iw inverted according to whether the motor M is in a driving mode or a regenerative mode, difference between the signals U-W and the signals Vu-Vw is counted to form compensation gate signals Uo-Wo, and a dead time is generated by a generator 6. The inverter 2 is controlled by the dead time through a base driver 7. Thus, it can effectively prevent an arm short circuit.
申请公布号 JPH0389868(A) 申请公布日期 1991.04.15
申请号 JP19890225529 申请日期 1989.08.31
申请人 MEIDENSHA CORP 发明人 YAMADA TETSUO
分类号 H02M7/48;H02P27/08 主分类号 H02M7/48
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