发明名称 FAULT DETECTION CIRCUIT
摘要 <p>PURPOSE:To reduce A/D converters for detecting a fault by attenuating the outputs of the D/A converters at an attenuation ratio which is inversely proportional to the number of D/A converters, adding and A/D-converting them, restoring attenuation in a control part, amplifying them, and comparing them with a reference value. CONSTITUTION:An attenuator 3 attenuates the output signals of the D/A converters 2-1 to 2-3 in correspondence with the constant attenuation ratio and outputs them to an adder 4. The adder 4 adds respective control signals which the attenuator 3 attenuates and outputs them to the A/D converter 5. The A/D converter 5 converts plural added control signals into digital signals and outputs them to the control part 1. The control part 1 adds the control values of the control signals outputted to the D/A converters 2-1 to 2-3, compares the control values with an input value from the A/D converter 5 by inversely multiplying the attenuation ratio of the attenuator 3. When a difference more than a decided reference value which is previously set occurs in a compared result, it is judged to be the fault of the A/D converters 2-1 to 2-3. Thus, only one A/D converter 5 is required and constitution is simplified.</p>
申请公布号 JPH0389717(A) 申请公布日期 1991.04.15
申请号 JP19890226796 申请日期 1989.09.01
申请人 NEC CORP 发明人 HOSHINO YOSHIRO
分类号 G05B23/02;H03M1/10 主分类号 G05B23/02
代理机构 代理人
主权项
地址