发明名称 EXTRACTED CLOCK PRIORITY CONTROL SYSTEM
摘要 <p>PURPOSE:To stably select an extracted clock by reducing the switching frequency of the clock by means of extracted clock priority control executing rotation in accordance with priority. CONSTITUTION:A selector 1 selects an S-th signal among signals a1-an in accordance with a selection control signal bs instructing seventh priority from a counter 3 and transmits it to a pulse generator 2. When the signal changes from the absence of abnormality to the presence of abnormality, a pulse string is transmitted from the pulse generator 2 to the n-ary counter 3 while a system returns to the absence of abnormality. The counter 3 up-counts a pulse from the pulse generator 2 and transmits a counted result to selectors selectors 1 and 4 as the signal bs. When abnormality occurs in the extracted clock in the middle of selection and output, the system shifts to the clock in low priority one by one, and the normal extracted clock can be detected, selected and outputted.</p>
申请公布号 JPH0389736(A) 申请公布日期 1991.04.15
申请号 JP19890227109 申请日期 1989.09.01
申请人 NEC CORP;NIPPON DENKI TRANSMISSION ENG KK 发明人 MANABE SATOSHI;AZUMA SEIJI
分类号 H04L7/00;H04L7/02;H04L7/033 主分类号 H04L7/00
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