发明名称 TIMING CIRCUIT
摘要 <p>PURPOSE: To obtain a stable and simple circuit with a low cost and reduced noises which can be easily manufactured by connecting a transistor pair serially connected with a current source and a condenser with a clock, and selectively charging and discharging one of the capacitors in a shorter time than the time cycle of one cycle of a clock cycle. CONSTITUTION: This circuit is provided with a counter 10 which counts the number of level transitions, and a current source circuit 11 transmits a selected current level to a ratio circuit 12 in a selected time. The ratio circuit 12 uses two capacitors C1 and C2 , and each capacitor is serially connected with transistors Q1 and Q2 , and each capacitor and transistor pair is mutually connected in parallel between a control current source and earth. At least one transistor is turned off in the selected capacitor and transistor column, simultaneously the other capacitor and transistor column is directly controlled in a clock cycle, and the capacitor is charged and discharged. Thus, the stable and precise circuit with reduced noises and a low cost which can be easily manufactured can be obtained.</p>
申请公布号 JPH0392913(A) 申请公布日期 1991.04.18
申请号 JP19900215113 申请日期 1990.08.16
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 JIYASUTEN ARUDEN BUOOKE;ORESUTO BUURA;GARETSUTO SUTEIBUN KOOKU;RICHIYAADO SANTEIAGO GOMESU
分类号 G06F1/06;H03K5/00;H03K5/135 主分类号 G06F1/06
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