发明名称 Inrush effect minimisation elimination or damping circuit - has ballast resistor of optimum size to limit inrush current
摘要 <p>A circuitry arrangement for elimination or damping of the "surge" effect in electrical circuits. It has a ballast resistance in series (BW1, BW2) in series with the uncontrolled electric valve and relevant load circuit switch in the current carrying half wave from which is used to take over the storage voltage in the first current flow path. The ballast resistor has its value so designed that the value of the 'surge' current is limited to below that of the take off current of the current user at full loading. The ballast resistor is short circuited by a notching device into the following half wave of the storage voltage when the uncontrolled electric valve is in the duct conduction.</p>
申请公布号 DE2536638(A1) 申请公布日期 1977.04.07
申请号 DE19752536638 申请日期 1975.08.16
申请人 PFANZELT,JOSEF 发明人 PFANZELT,JOSEF
分类号 H01H9/54;(IPC1-7):10K11/00 主分类号 H01H9/54
代理机构 代理人
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